Broccoli [webbroccolimicro.io]

Founder

Developed EDA flow for asynchronous chips, called Loom (see projects). Built a lecture series on asynchronous circuit design (see teaching), and taught this lecture series twice to small groups. Created many circuit modules required for a reconfigurable array chip architecture. Formed business, submitted proposals to NSF Seed Fund, Activate, NASA SBIR, and DIU, and whitepapers for other BAAs and granting opportunities. Created financial and manufacturing models for chip tapeout. Continuous outreach to local hard-tech communities.

Siden

Principal Backend Engineer

Developed a system that routes user requests through on-prem infrastructure in a large scale Content Distribution Network (CDN). Automated deployment of staging and production kubernetes clusters through terraform, helm, and gitlab CI/CD in collaboration with a cross-functional team. Mentored and managed six team members, three were promoted to leadership roles and are now managing small teams while owning and developing major subsystems of the product. Worked directly with Head of ML, CEO, Head of Engineering, and CTO in various contexts to structure pilot programs and translate customer experience and feedback into product and architectural evolutions.

Siden

Senior Software Engineer

Increased the scalability of the content delivery scheduling system by two orders of magnitude. Designed and implemented the event processing system including real-time evaluation of 20 different KPIs and management of dataflow for analytics. Organized and mediated review of five major system architecture specifications as head of the Architecture Review Board. These systems formed the fundamental backbone of the final product.

Google

Software Engineer

Developed the emoji picker in 2018 for chat.google.com including front and back end design. Designed and implemented a complete development environment and circuit library for self-timed circuits in 2016 with automatic test generation and mixed-signal simulation.

Qualcomm Research and Development

Hardware Researcher

Invented a variety of self-timed multipliers, exploiting irregular data patterns for efficient solutions.

Intel Corporation

Pre-Silicon Validation Engineer

Design of tests and test coverage for the power controller of the Haswell architecture in 2012 and low level cache of the Ivytown architecture in 2011. Design and implementation of a static analysis tool to automatically generate tests from coverage reports.

Architecture Technology Corporation

Programmer

Development of scripts and Java plugins to extend support for two computer forensics tools: RouterMarshal and P2PMarshal.

Indiana University's Perception Action Lab

Programmer

Implemented a variety of displays for scientific experiments in human perception that have since been published. Developed other tools including a program to help assign teaching assistants, a tool for analysis of bacterial cultures, and the website for the lab.

Master of Business Administration, Entrepreneurship, Marketing

Indiana University, Kelley School of Business (transcript)

Corporate Finance Academy, Kelley School of Business Merit Fellowship Award, Entrepreneurship Innovation Academy, Elevate Ventures Challenge First Place

PhD, Computer Engineering

Cornell University (visiting Yale University) (transcript)

Analyzed statistical behavior of program workload for optimizable features, invented a collection of arithmetic operators using those program workload features that doubled throughput per transistor and halved energy per operation on average compared to industry standard approaches.

Masters of Science, Computer Engineering

Cornell University
GPA 4.00 (transcript)

Developed an automated formal synthesis engine for Quasi-Delay Insensitive circuits including a simulator, state space elaborator, and state conflict checker for Handshaking Expansions along with partial implementations for unique state encoding and guard strengthening.

Bachelor of Engineering, Computer Engineering

Cornell University
GPA 3.29 (transcript)

Loom (QDI Circuits, EDA Design, Full Custom Tapeout, C++)

github.com/broccolimicro/loom

A full EDA toolset for Quasi-Delay Insensitive circuits including high level synthesis of complex state machines, simulation, automated sizing, netlisting, cell generation, cell library management, automated cell layout, extraction, and layout vs schematic. Circuits are described as an abstract behavioral model in Communicating Hardware Processes (CHP) and formal transformations are applied to synthesize a digital circuit.

Stanford's Braindrop Project (Memory Systems, Cell Layout, Full Custom Tapeout)

web.stanford.edu/group/brainsinsilicon/publications

Collaborated on the tapeout of the Braindrop chip, and was responsible for the design, verification, and layout of the asynchronous memory.

Blaze Game Engine (C++, GLSL, OpenGL)

github.com/nbingham1/Blaze

A rendering engine for large randomly generated planets with smooth level-of-detail transition from space to ground.

Standard Core (C++)

github.com/c-cores/stdcore

A full container library implemented as an educational exercise, implementing generic slices using any container of iterators.

Boolean (C++, Bit-Manipulation)

github.com/nbingham1/boolean

A library for fast many-variable boolean logic synthesis.

www.FickleFridge.com (PHP, CSS, Javascript, Web Design)

github.com/nbingham1/ficklefridge

A recipe website that calculates the ingredients that are more likely to be in a recipe with the ingredients already selected.

Toy Neuron (Small Electronics, C)

nbingham1.github.io/neuron

Four small neuron toys that can be connected together to form a simple neural network. Upon firing, a set of LEDs along the axon and dendrites light up in sequence to show a depolarization travel from one neuron to the next.

Violet Satellite at Cornell University (Embedded Systems, C)

Communication and Data Handling, Sensors Manager

Managed the interactions between the flight computer and the sensors, keeping track of data formats, data transfer speeds, and sensor health.